A data optimization test technique for characterizing embedded ADCs
| ISSN: |
1573-0727
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| Keywords: |
ADCs ; histogram ; FFT ; optimization ; embedded
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| Source: |
Springer Online Journal Archives 1860-2000
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| Topics: |
Electrical Engineering, Measurement and Control Technology
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| Notes: |
Abstract A novel data optimization test technique is presented which utilizes a BIST structure, an ADC model and histogram data to characterize embedded ADCs. A practical 8 bit ADC is modeled and then characterized using 20% less data points then conventional analysis with a 78% reduction in the amount of data required to be shifted off-chip. Comparisons between theoretical, modeled and practical results are also made in the paper.
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| Type of Medium: |
Electronic Resource
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| URL: |